MC10EP451, MC100EP4513.3V / 5VECL 6−Bit
Differential Register withMaster Reset
Description
The MC10/100EP451 is a 6−bit fully differential register withcommon clock and single−ended Master Reset (MR). It is ideal forvery high frequency applications where a registered data path isnecessary.
All inputs have a 75 kW pulldown resistor internally. Differentialinputs have an override clamp. Unused differential register inputs canbe left open and will default LOW. When the differential inputs areforced to < VEE + 1.2 V, the clamp will override and force the output toa default state. When in the default state, and since the flip−flop is edgetriggered, the output reaches a determined, but not predicted, validstate.
The positive transition of CLK (pin 4) will latch the registers.Master Reset (MR) HIGH will asynchronously reset all registersforcing Q outputs to go LOW.
The 100 Series contains temperature compensation.
Features
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MARKINGDIAGRAM*LQFP−32FA SUFFIXCASE 873AMCxxxEP451AWLYYWWG3211132•••••••••
450 ps Typical Propagation Delay
Maximum Frequency > 3.0 GHz TypicalAsynchronous Master Reset
20 ps Skew Within Device, 35 ps Skew Device−To−DevicePECL Mode Operating Range: VCC = 3.0 V to 5.5 VWith VEE = 0 V
NECL Mode Operating Range: VCC = 0 VWith VEE = −3.0 V to −5.5 VOpen Input Default StateSafety Clamp on Inputs
Pb−Free Packages are Available*
QFN32MN SUFFIXCASE 488AMxxxAWL, LYY, YWW, WGMCxxxEP451ALYWG= 10 or 100= Assembly Location= Wafer Lot= Year= Work Week= Pb−Free Package*For additional marking information, refer to Application Note AND8002/D.ORDERING INFORMATION
*For additional information on our Pb−Free strategy and soldering details, pleasedownload the ON Semiconductor Soldering and Mounting TechniquesReference Manual, SOLDERRM/D.
See detailed ordering and shipping information in the packagedimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 20061
March, 2006 − Rev. 8
Publication Order Number:
MC10EP451/D
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MC10EP451, MC100EP451
D4D5D5Q5Q5VEEQ4Q4D1
24D4D3D3VEEMRD2D2D125262728293031321234567823222120191817161514VCCQ3Q3VCCQ2Q2Q1Q1
D1D0D0CLKCLKVCCQ0Q0123456789Q1
D1D0D0CLKCLKVCCQ0Q010Q111Q2
12
13
14
15
16
32
D231
D2MRVEED330
29
28
27
D326
D425
24D423D522D5
MC10EP451MC100EP451131211109MC10EP451MC100EP451
21Q520Q519VEE18Q417Q4
Q2VCCQ3Q3VCC
Figure 2. QFN−32 Pinout (Top View)
Warning: All VCC and VEE pins must be externally connected to PowerSupply to guarantee proper operation.
Figure 1. LQFP−32 Pinout (Top View)
D0D0DQQ0Q0RTable 1. PIN DESCRIPTION
PIND [0:5]*, D [0:5]*MR*CLK*, CLK*Q [0:5], Q [0:5]VCCVEEEP for QFN−32,onlyFUNCTIONECL Differential Data InputsECL Master Reset InputECL Differential Clock InputsECL Differential Data OutputsPositive SupplyNegative SupplyThe Exposed Pad (EP) on theQFN−32 package bottom isthermally connected to the diefor improved heat transfer outof package. The exposed padmust be attached to a heat−sinking conduit. The pad iselectrically connected to VEE.D1D1DQQ1Q1RD2D2DQQ2Q2RD3D3DQQ3Q3RD4D4*Pins will default LOW when left open.
DQQ4Q4RD5D5CLKCLKMRDQQ5Q5RVEEFigure 3. Logic Diagramhttp://onsemi.com
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MC10EP451, MC100EP451
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown ResistorInternal Input Pullup ResistorESD Protection
Human Body Model
Machine Model
Charged Device Model
Pb PkgLevel 2
Value75 kWN/A> 2 kV> 200 V> 2 kV
Pb−Free PkgLevel 2Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
LQFP−32QFN−32
Flammability RatingTransistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test1.For additional information, see Application Note AND8003/D.
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
919 Devices
Table 3. MAXIMUM RATINGS
SymbolVCCVEEVIIoutTATstgqJAqJCqJAqJCTsol
Parameter
PECL Mode Power SupplyNECL Mode Power SupplyPECL Mode Input VoltageNECL Mode Input VoltageOutput Current
Operating Temperature RangeStorage Temperature Range
Thermal Resistance (Junction−to−Ambient)Thermal Resistance (Junction−to−Case)Thermal Resistance (Junction−to−Ambient)Thermal Resistance (Junction−to−Case)Wave Solder
PbPb−Free
0 lfpm500 lfpmStandard Board0 lfpm500 lfpm2S2P
LQFP−32LQFP−32LQFP−32QFN−32QFN−32QFN−32
Condition 1VEE = 0 VVCC = 0 VVEE = 0 VVCC = 0 VContinuousSurge
VI v VCCVI w VEE
Condition 2
Rating6−66−650100−40 to +85−65 to +150
805512 to 17312712265265
UnitVVVVmAmA°C°C°C/W°C/W°C/W°C/W°C/W°C/W°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limitvalues (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.
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MC10EP451, MC100EP451
Table 4. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
SymbolIEEVOHVOLVIHVILVIHCMR
Characteristic
Power Supply CurrentOutput HIGH Voltage (Note 3)Output LOW Voltage (Note 3)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 4)
Input HIGH CurrentInput LOW Current
0.5
−40°C
SymbolIEEVOHVOLVIHVILVIHCMR
Characteristic
Power Supply CurrentOutput HIGH Voltage (Note 3)Output LOW Voltage (Note 3)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 4)
Input HIGH CurrentInput LOW Current
0.5
−40°C
SymbolIEEVOHVOLVIHVILVIHCMR
Characteristic
Power Supply CurrentOutput HIGH Voltage (Note 3)Output LOW Voltage (Note 3)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 4)
Input HIGH CurrentInput LOW Current
0.5Min80−1135−1935−1210−1935VEE+2.0
Typ95−1010−1810
Max125−885−1685−885−16100.0
Min80−1070−1870−1145−1870VEE+2.0
Min8038653065379030652.0
Typ9539903190
Max12541153315411533905.0
Min8039303130385531302.0
Min8021651365209013652.0
Typ9522901490
Max12524151615241516903.3
Min8022301430215514302.0
25°CTyp9523551555
Max12524801680248017553.3
Min8022901470221514902.0
85°CTyp9524151615
Max12525401740254018153.3
UnitmAmVmVmVmVV
IIHIIL
150
0.5
25°CTyp9540553255
150
0.5
85°C
Max12541803380418034555.0
Min8039903170391531902.0
Typ9541153315
150mAmA
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
Max12542403440424035155.0
UnitmAmVmVmVmVV
IIHIIL
150
0.5
25°CTyp95−945−1745
150
0.5
85°C
Max125−820−1620−820−15450.0
Min80−1010−1830−1085−1810VEE+2.0
Typ95−885−1685
150mAmA
Table 6. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 6)
Max125−760−1560−760−14850.0
UnitmAmVmVmVmVV
IIHIIL
150
0.5
150
0.5
150mAmA
NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.
2.Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.3.All loading with 50 W to VCC − 2.0 V.
4.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.
5.Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.6.Input and output parameters vary 1:1 with VCC.
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Table 7. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 7)
−40°C
SymbolIEEVOHVOLVIHVILVIHCMR
Characteristic
Power Supply CurrentOutput HIGH Voltage (Note 8)Output LOW Voltage (Note 8)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 9)
Input HIGH CurrentInput LOW Current
0.5Min8521551355207513552.0
Typ10522801480
Max13524051605242016753.3
Min8521551355207513552.0
25°CTyp10522801480
Max13524051605242016753.3
Min8521551355207513552.0
85°CTyp10522801480
Max13524051605242016753.3
UnitmAmVmVmVmVV
IIHIIL
150
0.5
150
0.5
150mAmA
NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.
7.Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.8.All loading with 50 W to VCC − 2.0 V.
9.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 10)
−40°C
SymbolIEEVOHVOLVIHVILVIHCMR
Characteristic
Power Supply CurrentOutput HIGH Voltage (Note 11)Output LOW Voltage (Note 11)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 12)
Input HIGH CurrentInput LOW Current
0.5Min8538553055377530552.0
Typ10539803180
Max13541053305412033755.0
Min8538553055377530552.0
25°CTyp10539803180
Max13541053305412033755.0
Min8538553055377530552.0
85°CTyp10539803180
Max13541053305412033755.0
UnitmAmVmVmVmVV
IIHIIL
150
0.5
150
0.5
150mAmA
NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.
10.Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.11.All loading with 50 W to VCC − 2.0 V.
12.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.
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MC10EP451, MC100EP451
Table 9. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 13)
−40°C
SymbolIEEVOHVOLVIHVILVIHCMR
Characteristic
Power Supply Current
Output HIGH Voltage (Note 14)Output LOW Voltage (Note 14)Input HIGH Voltage (Single−Ended)Input LOW Voltage (Single−Ended)Input HIGH Voltage Common ModeRange (Differential Configuration)(Note 15)
Input HIGH CurrentInput LOW Current
0.5Min85−1145−1945−1225−1945VEE+2.0
Typ105−1020−1820
Max135−895−1695−880−16250.0
Min85−1145−1945−1225−1945VEE+2.0
25°CTyp105−1020−1820
Max135−895−1695−880−16250.0
Min85−1145−1945−1225−1945VEE+2.0
85°CTyp105−1020−1820
Max135−895−1695−880−16250.0
UnitmAmVmVmVmVV
IIHIIL
150
0.5
150
0.5
150mAmA
NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.
13.Input and output parameters vary 1:1 with VCC.14.All loading with 50 W to VCC − 2.0 V.
15.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differentialinput signal.
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 16)
−40°C
SymbolVOUTpptPLH,tPHLtRRtStHtPWtSKEWtJITTERtrtf
Characteristic
Output Voltage Amplitude @ 3 GHz(Figure 4) (Note 17)Propagation Delay to Output DifferentialReset RecoverySetup TimeHold Time
Minimum Pulse Rate
Within−Device Skew (Note 18)Device−To−Device Skew (Note 19)CLOCK Random Jitter (RMS)@ v3.0 GHz (Figure 4)Output Rise/Fall Times(20% − 80%)
Q, Q100100
CLK to Q, QMR to Q, QMR to CLKD to CLKCLK to D
MR
Min5403304302408080400
20350.2150150
401001250250
110110
Typ6704305301454040
530630Max
Min5203504502508080400
20350.2160160
401001260260
130130
25°CTyp6504505501504040
550650Max
Min4503904902608080400
20350.2180180
401001280280
psps
85°CTyp5804905901604040
590690Max
UnitGHzpspspsps
NOTE:Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limitvalues are applied individually under normal operating conditions and not valid simultaneously.
16.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.17.VOL and VOH specifications not guaranteed for Fmax testing.
18.Skew is measured between outputs under identical transitions and conditions on any one device.19.Device−To−Device skew for identical transitions at identical VCC levels.
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900800VOUTpp (mV)70060050040030020010000.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
5 V3.3 VFREQUENCY (MHz)
Figure 4. Fmax Typical
QDriverDeviceQZo = 50 WDReceiverDeviceZo = 50 W50 W50 WDVTT
VTT = VCC − 2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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ORDERING INFORMATION
Device
MC10EP451FAMC10EP451FAGMC10EP451FAR2MC10EP451FAR2GMC100EP451FAMC100EP451FAGMC100EP451FAR2MC100EP451FAR2GMC10EP451MNGMC10EP451MNR4GMC100EP451MNGMC100EP451MNR4G
QFN−32(Pb−Free)PackageLQFP−32LQFP−32(Pb−Free)LQFP−32LQFP−32(Pb−Free)LQFP−32LQFP−32(Pb−Free)LQFP−32LQFP−32(Pb−Free)
Shipping†250 Units / Tray250 Units / Tray2000 / Tape & Reel2000 / Tape & Reel250 Units / Tray250 Units / Tray2000 / Tape & Reel2000 / Tape & Reel72 Units / Tray1000 / Tape & Reel72 Units / Tray1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/DAN1406/DAN1503/DAN1504/DAN1568/DAN1642/DAND8001/DAND8002/DAND8020/DAND8066/DAND8090/D
−ECL Clock Distribution Techniques−Designing with PECL (ECL at +5.0 V)−ECLinPSt I/O SPiCE Modeling Kit−Metastability and the ECLinPS Family−Interfacing Between LVDS and ECL−The ECL Translator Guide−Odd Number Counters Design−Marking and Date Codes−Termination of ECL Logic Devices−Interfacing with ECLinPS
−AC Characteristics of ECL Devices
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PACKAGE DIMENSIONS
LQFP−32FA SUFFIXCASE 873A−02
ISSUE B
−T−, −U−, −Z−AE−U−VB18A324X25A10.20 (0.008)ABT−UZ1−T−BDETAIL Y17PAEDETAIL YV199−Z−S1S4X0.20 (0.008)ACT−UZG−AB−SEATINGPLANEDETAIL AD−AC−0.10 (0.004)ACBASEMETALN8XM_RJ0.20 (0.008)FDNOTES:1.DIMENSIONING AND TOLERANCINGPER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DATUM PLANE −AB− IS LOCATED ATBOTTOM OF LEAD AND IS COINCIDENTWITH THE LEAD WHERE THE LEADEXITS THE PLASTIC BODY AT THEBOTTOM OF THE PARTING LINE.4.DATUMS −T−, −U−, AND −Z− TO BEDETERMINED AT DATUM PLANE −AB−.5.DIMENSIONS S AND V TO BEDETERMINED AT SEATING PLANE −AC−.6.DIMENSIONS A AND B DO NOT INCLUDEMOLD PROTRUSION. ALLOWABLEPROTRUSION IS 0.250 (0.010) PER SIDE.DIMENSIONS A AND B DO INCLUDEMOLD MISMATCH AND AREDETERMINED AT DATUM PLANE −AB−.7.DIMENSION D DOES NOT INCLUDEDAMBAR PROTRUSION. DAMBARPROTRUSION SHALL NOT CAUSE THED DIMENSION TO EXCEED 0.520 (0.020).8.MINIMUM SOLDER PLATE THICKNESSSHALL BE 0.0076 (0.0003).9.EXACT SHAPE OF EACH CORNER MAYVARY FROM DEPICTION.MILLIMETERSMINMAX7.000 BSC3.500 BSC7.000 BSC3.500 BSC1.4001.6000.3000.4501.3501.4500.3000.4000.800 BSC0.0500.1500.0900.2000.5000.700_12 REF0.0900.1600.400 BSC__1 5 0.1500.2509.000 BSC4.500 BSC9.000 BSC4.500 BSC0.200 REF1.000 REFINCHESMINMAX0.276 BSC0.138 BSC0.276 BSC0.138 BSC0.0550.0630.0120.0180.0530.0570.0120.0160.031 BSC0.0020.0060.0040.0080.0200.028_12 REF0.0040.0060.016 BSC__1 5 0.0060.0100.354 BSC0.177 BSC0.354 BSC0.177 BSC0.008 REF0.039 REFCESECTION AE−AEMACT−UZXDETAIL ADGAUGE PLANEhttp://onsemi.com
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0.250 (0.010)HWKQ_DIMAA1BB1CDEFGHJKMNPQRSS1VV1WX元器件交易网www.cecb2b.com
MC10EP451, MC100EP451
PACKAGE DIMENSIONS
QFN32 5*5*1 0.5 PCASE 488AM−01
ISSUE O
ABNOTES:1.DIMENSIONS AND TOLERANCING PERASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b APPLIES TO PLATEDTERMINAL AND IS MEASURED BETWEEN0.25 AND 0.30 MM TERMINAL4.COPLANARITY APPLIES TO THE EXPOSEDPAD AS WELL AS THE TERMINALS.MILLIMETERSMINNOMMAX0.8000.9001.0000.0000.0250.0500.200 REF0.1800.2500.3005.00 BSC2.9503.1003.2505.00 BSC2.9503.1003.2500.500 BSC0.200−−−−−−0.3000.4000.500DPIN ONELOCATIONE2 X
2 X0.15C0.15C0.10CTOP VIEW(A3)A32 X0.08CL32 XSIDE VIEWA1C EXPOSED PADSEATINGPLANEDIMAA1A3bDD2EE2eKL98D216K1732 XSOLDERING FOOTPRINT*5.30E23.20132252432 X0.63e3.205.30b0.10CAB32 X0.05CBOTTOM VIEW32 X0.2828 X0.50 PITCH*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further noticeto any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. Alloperating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rightsnor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. ShouldBuyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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